The invention pertains to the fabrication of field effect transistors (FETs), particularly heterostructure FETs (HFETs). More particularly, the invention pertains to a self-aligned gate heterostructure insulated gate (HIG) FET having a parasitic capacitance between the gate pad and the remaining FET structure, and a method and structure for minimizing such capacitance.
In the related art there is a significant capacitance between the gate pad and the FET structure. Attempts to reduce that capacitance include ion implanting at the surface of the heterostructure wafer before the gate pad is formed. However, this results in the production of HFETs that are not adequate or uniform, especially relative to one another.